1. Field of the Invention
The present invention relates to a memory device which is suitable for storing and reading out texture data to be mapped on polygons forming an object displayed on a display device and a video image processing apparatus using the same.
2. Description of the Related Art
In recent years, video image processing apparatus has spread for displaying objects positioned in a virtual three-dimensional space by employing computer graphics. Additionally, research and development have been conducted to make the displayed objects close to virtual reality.
In the computer graphics, details on surfaces of a displayed object are called as textures. By reading texture data from a texture map and mapping them on every pixels of polygons forming an appropriate object, tone of color, grain and touch can be formed on the object.
FIGS. 8 and 9 are explanatory diagrams for mapping the texture data. FIG. 8 illustrates one example of a polygon which is developed on a two-dimensional coordinate plane to be displayed on a display device and stored in a frame buffer.
A polygon P shown in FIGS. 8 and 9 has three vertexes A, B, and C, each of which has one coordinate of X and Y axes on a texture map storing the texture data to be mapped as vertex data.
For example, a vertex A has coordinate data of (T.sub.x0, T.sub.y0) on the texture map, which indicates a position for storing the texture data mapped to the pixel of the vertex A. Vertexes B and C also have coordinate data of (T.sub.x1, Ty.sub.y1) and (T.sub.x2, Ty.sub.y2) respectively.
In addition, for example, for the pixel at a point D on a ridgeline between the vertexes A and B, coordinate data (T.sub.xi, T.sub.yi) on the texture map can be obtained by interpolating the coordinate data (T.sub.x0, T.sub.y0) of the vertex A and the coordinate data (T.sub.x1, Ty.sub.y1) of the vertex B. For all of the other pixels forming the polygon P, coordinate data on the texture map can be similarly obtained by the interpolation.
On the other hand, on the texture map, each texture of the object is developed like a map and is stored in a memory device, for example, if the object is a rock, texture data for expressing a surface of the rock is developed like a map, and if the object is a tree, texture data for expressing a surface of the tree is developed like a map. In other word, the surface of a rock or tree is not uniform as defined by one data but is continuously varied.
The texture map is obtained by developing the textures, such as the surfaces of a rock or tree, on a plane of X and Y coordinate axes. Therefore, the textures of the surfaces of a rock or a tree cab be obtained by specifying the positions of the X and Y coordinate axes.
FIG. 10 is a diagram showing a relationship between a plane having two axes and one pixel of the polygon on the texture map. In FIG. 10, TP means an area of pixels specified by the X and Y coordinate axes on the texture map. Each area of the pixels has texture data. On the other hand, PP means one pixel forming a polygon, and PC means a center of the PP.
A position of the X and Y coordinate axes on the texture map can be specified corresponding to the pixel P. One pixel forming a polygon has dimensions as shown in FIG. 10. Therefore, one pixel forming a polygon is bestriding over a plurality of adjacent pixels on the texture map. Further, the texture on the surface of an object generally has continuity.
Therefore, the texture data for one pixel forming the polygon is generated by combining the plurality of adjacent pixel data on the texture map, which are overlapped to one pixel forming the polygon.
It is required to read out the texture data for the plurality of pixels from the texture map when generating the texture data for one pixel forming the polygon.
From the view point of video image processing in high speed, it is further preferable to concurrently read out texture data for a plurality of pixels.
However, it was difficult to specify two or more addresses concurrently to a data storage in conventional memory devices. Further, as a plurality of address lines were required for one data storage, it was also difficult to make circuit integration ratio higher in a conventional dual port memory.